Evaluating the Potential of Future On-Chip Clock Distribution using Optical Interconnects

Designing clock distribution networks is a big challenge for future microprocessors due to increasing frequency, power, transistor counts and process variations. As technology scales, implementing conventional clock distribution networks that meet low power and skew requirements is becoming more difficult. On the other hand, optical interconnects are being proposed as an alternative to electrical interconnects due to their speed-of-light transmission, high bandwidth and low power dissipation. We look at the clock distribution trends in major microprocessor families, possible techniques for optical clocking, and the potential of moving from electrical to optical clock distribution. We found that clock distribution is largely a power amplification problem, and since electrical power amplification is more efficient that optical power amplification, wholly electrical clock distribution technologies would be preferred.